Field of the Invention
The present invention relates to analog-to-digital converters (ADCs).
Description of the Related Art
In electronics, an analog-to-digital converter is a system that converts an analog input into a digital signal. ADCs with charge-redistribution successive approximation (SAR) are common today.
FIG. 1 depicts an example of a successive approximation analog-to-digital converter (SAR ADC). During the first operation phase, an input voltage Vin is bottom-plate sampled onto a weighted capacitor array 102. After this sampling phase, the bottom plates of the capacitors within the weighted capacitor array 102 are switched to a common-mode voltage GND for a successive approximation scheme. The comparator 104 tests the sign of the sampled voltage (obtained from the top plate TP of the weighted capacitor array 102) and the sign decision output from the comparator 104 is fed back to switch the bottom plate voltage of the current MSB (Most Significant Bit) capacitor within the weighted capacitor array 102. When a voltage subtraction is required, the bottom plate of the current MSB capacitor is switched to the lower reference voltage Vrefl. When a voltage addition is required, the bottom plate of the current MSB capacitor is switched to the higher reference voltage Vrefh. The bottom plates of the capacitors within the weighted capacitor array 102 are switched one by one in the successive approximation scheme. The output of the comparator 104 is collected and transformed to a digital representation Dout of the input voltage Vin.
However, the sampling phase plus the successive approximation scheme limit the speed of the analog-to-digital conversion.
Furthermore, quantization error and noise from the comparator 104 should also be taken into consideration when designing an analog-to-digital converter.